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Strategic Analysis
This HORIZON-JU-CHIPS-2026-1-RIA call demands a technology-driven, application-focused approach that aligns with the Chips JU Strategic Research and Innovation Agenda (SRIA). Winning proposals will demonstrate innovative semiconductor technologies (functional layers, cross-sectional tech) applied to key societal challenges (e.g., energy efficiency, healthcare, mobility) while ensuring valorisation for the Chips JU ecosystem. The consortium must balance technology development (TRL 3→4) with real-world relevance and deployment planning to meet evaluator expectations for impact, scalability, and ecosystem contribution.
TRL 3 → 4
Establish new knowledge and/or explore the feasibility of a new or improved technology, product, process, service, method, tool or solution.
Include applied research, technology development and/or method/tool and integration, testing and validation on a small-scale prototype in a laboratory or simulated environment.
Develop innovative technologies and/or use them in innovative ways.
Target demonstration of the innovative approach in a relevant product, service or capability, clearly addressing the applications relevant for societal challenges.
Demonstrate value and potential in a realistic lab environment reproducing the targeted application.
Include a deployment plan showing the valorisation for the Chips JU ecosystem and the contribution to the Chips JU goals and objectives.
Develop a balanced portfolio of projects developing innovative technologies (as defined in the SRIA in the functional technology layers and cross-sectional technologies sections) and applying them in different domains (as defined in the SRIA in key application areas section).
Execution by a consortium that may consist of SMEs, large enterprises, universities, institutes, public organizations.
Demonstration of the innovative approach in a relevant product, service or capability, addressing societal challenges.
Valorisation for the Chips JU ecosystem and contribution to the Chips JU goals and objectives.
No expected impacts identified for this destination.
No EU policy alignment identified for this call.
1. Admissibility conditions — Proposal page limit and layout Proposal page limits and layout: detailed in Part B of the Application Form , which you can access from the Call documents section on the Chips JU website's Call page The following information are all described in the Appendix 7 of the Chips JU Workprogramme
2. Eligible Countries
3. Other Eligibility Conditions
4. Financial and operational capacity and exclusion
5a. Evaluation and award: Award criteria, scoring and thresholds
5b. Evaluation and award: Submission and evaluation processes
5c. Evaluation and award: Indicative timeline for evaluation and grant agreement
6. Legal and financial set-up of the grants
Please visit the Call page of the Chips JU Website Call document and annexes: Call document The Call Documents Section contains all the call documents, which are listed here: Reference documents Guide for Applicants Evaluation form Call submission documents and annexes Application form template Part B National funding table template Ownership declaration template
Guidance HE Programme Guide Model Grant Agreements (MGA) HE MGA Call-specific instructions Information on financial support to third parties (HE) Information on clinical studies (HE)
EU Financial Regulation 2024/2509 Rules for Legal Entity Validation, LEAR Appointment and Financial Capacity Assessment EU Grants AGA — Annotated Model Grant Agreement Funding & Tenders Portal Online Manual Funding & Tenders Portal Terms and Conditions Funding & Tenders Portal Privacy Statement
Evaluators will prioritize:
Everything the call asks for, seen from the call's point of view. Each line shows what answers it, and which partner carries it.
This matrix lists everything the call asks for: outcomes, impacts, scope, the requirements buried in the call text, and policy alignment. Sign up free and GrantForge tracks each line against the concept you build.
| Requirement | Covered by | Carried | Status |
|---|---|---|---|
| Scope activities | |||
| SC1Establish new knowledge and/or explore the feasibility of a new or improved technology, product, process, service, method, tool or solution. | · | · | Sign up to track |
| SC2Include applied research, technology development and/or method/tool and integration, testing and validation on a small-scale prototype in a laboratory or simulated environment. | · | · | Sign up to track |
| SC3Develop innovative technologies and/or use them in innovative ways. | · | · | Sign up to track |
| SC4Target demonstration of the innovative approach in a relevant product, service or capability, clearly addressing the applications relevant for societal challenges. | · | · | Sign up to track |
| SC5Demonstrate value and potential in a realistic lab environment reproducing the targeted application. | · | · | Sign up to track |
| SC6Include a deployment plan showing the valorisation for the Chips JU ecosystem and the contribution to the Chips JU goals and objectives. | · | · | Sign up to track |
| SC7Develop a balanced portfolio of projects developing innovative technologies (as defined in the SRIA in the functional technology layers and cross-sectional technologies sections) and applying them in different domains (as defined in the SRIA in key application areas section). | · | · | Sign up to track |
| Expected outcomes | |||
| EO1Execution by a consortium that may consist of SMEs, large enterprises, universities, institutes, public organizations. | · | · | Sign up to track |
| EO2Demonstration of the innovative approach in a relevant product, service or capability, addressing societal challenges. | · | · | Sign up to track |
| EO3Valorisation for the Chips JU ecosystem and contribution to the Chips JU goals and objectives. | · | · | Sign up to track |
| Other requirements | |||
| No other requirements in this call. | |||
| Expected impacts | |||
| No expected impacts in this call. | |||
| Underlying policies | |||
| No underlying policies in this call. | |||
The binding rules of this call. Items marked auto are verified by GrantForge from the call and the template. The others are yours to confirm.
LMIC entities auto-eligible
Low/middle-income country entities are automatically eligible for funding.
Page limit Stage 1
Part B Section 1+2+3 combined is typically capped at 10 pages at Stage 1. Pages exceeding the limit are invisible to evaluators.
Consortium continuity
The consortium declared at Stage 1 is expected to submit Stage 2. Substantial changes must be justified.
EU space data infrastructures
If the project uses satellite-based Earth observation, positioning, navigation or timing data/services, beneficiaries must use Copernicus and/or Galileo/EGNOS.
Civil applications only
Exclusive military or dual-use applications are excluded.
Talk to the Grant Coach to build your concept. The steps below fill in as it takes shape, and your coverage tracks the progress. You can refine everything once your project workspace is created.
Step 1 of 2 · Build your concept
The problems this call frames, and who they affect. Your concept and plan address them.
Current semiconductor technologies face limitations in energy efficiency, particularly in power-hungry applications like data centers, electric vehicles, and IoT devices. This leads to high operational costs, increased carbon footprints, and reduced sustainability (@TG01, @TG02).
Many semiconductor innovations remain generic and fail to address specific societal needs (e.g., healthcare diagnostics, climate resilience, or smart mobility). This gap limits their real-world impact and adoption (@TG02).
The European semiconductor ecosystem is fragmented, with weak linkages between technology developers, end-users, and policymakers. This hinders the commercialization and deployment of innovative solutions, reducing their contribution to the Chips JU goals (@TG01, @TG04).
Companies involved in semiconductor design, manufacturing, and integration, including fabless firms, foundries, and equipment suppliers. These actors will directly benefit from the developed technologies and contribute to their validation and deployment.
Industries that will integrate the semiconductor technology into their products/services (e.g., electric vehicles, medical devices, renewable energy systems). Their involvement ensures market relevance and application-driven innovation.
Academic and research institutions working on semiconductor materials, devices, and systems. They will benefit from the project’s scientific advancements, publications, and open-access knowledge dissemination.
Public authorities and organizations (e.g., European Commission, ETSI, IEC) involved in shaping semiconductor policies, regulations, and standards. They will leverage project outcomes to inform future strategies and frameworks.
Step 2 of 2 · Build your concept
The long-term impacts your project should drive — this shapes the objectives next.
By developing and deploying energy-efficient semiconductor technologies, the project will contribute to decarbonization efforts in key sectors (e.g., ICT, automotive, energy). This aligns with the EU Green Deal and Chips JU sustainability goals.
The project will enhance resource efficiency in semiconductor production (e.g., reduced material waste, lower water/energy consumption) and in end-user applications (e.g., longer battery life, reduced e-waste). This supports circular economy principles and sustainable industrialization.
The project will strengthen the European semiconductor value chain by fostering innovation, collaboration, and commercialization. This will reduce dependency on non-EU suppliers and position Europe as a leader in next-generation semiconductor technologies.
The project will demonstrate the feasibility and benefits of semiconductor technologies in addressing societal challenges (e.g., healthcare, mobility, energy). This will accelerate their adoption and improve quality of life for end-users.
The project will generate new knowledge and publish findings in peer-reviewed journals, contributing to the global research community in microelectronics and semiconductor technologies.